Senior Director, ASIC Design

Why join Upscale AI

Upscale AI is building the high-performance infrastructure powering the next generation of artificial intelligence. Backed by over $300M in funding and rapid global adoption, we are scaling systems designed for the world’s most demanding AI workloads.

We focus on first-principles engineering across silicon, systems, and networking—where performance, scale, and execution are critical. Our team is talent-dense and high-performing. We value ownership, technical rigor, and speed, and we offer the opportunity to work on foundational problems with immediate, real-world impact.

If you’re looking to do high-impact work, move fast, and help define the infrastructure behind the future of AI—Upscale AI is where you can produce meaningful work at the frontier—and operate at a high standard.

Role Overview

The Senior Director, ASIC Design is a hands-on leader responsible for building a design team from the ground up and driving the technical execution of Upscale AI's next-gen networking switch ASICs using open standards like Ethernet, UAlink etc.. The ideal candidate is deeply technical with a background in leading large Asic teams to deliver networking switch silicon. . 

This role is for someone who thrives at the intersection of hands-on engineering and team building in a fast-moving startup environment.

Responsibilities

• Chip lead, owning technical execution from micro-architecture through the final netlist delivery for next-gen ASIC switch chiplets.

• Build the team - define the hiring plan, recruit top talent, and mentor engineers into a cohesive, high-performing unit capable of delivering complex chip programs

• Remain deeply hands-on: drive microarchitecture definition, review and write RTL when necessary, lead design reviews, mentor/coach the team to excel 

• Lead all phases of ASIC front-end development — microarchitecture specification, RTL coding, lint and CDC, synthesis, timing closure, and DFT — ensuring final netlists are delivered on schedule and within PPA targets

• Establish design methodologies in AI era, coding standards, and review processes that ensure first-pass silicon success and design reuse across chip generations

• Drive technical collaboration with verification, physical design, firmware, and systems engineering teams to deliver cross-functional deliverables and ensure cohesive product delivery

• Evaluate and adopt third-party IP, and EDA tools; make build-vs-buy decisions that balance risk, schedule, and engineering effort

• Communicate program status, technical risks, and trade-offs to senior leadership; represent the design team in customer and partner engagements

Where you fall within that range depends on your experience, skills, and impact—we benchmark against internal levels to keep things fair and consistent.

Equal Opportunity

Upscale AI is building a team that reflects a wide range of perspectives, backgrounds, and experiences. We’re proud to be an Equal Opportunity Employer and consider all qualified applicants regardless of race, color, religion, national origin, sex, sexual orientation, gender identity, disability, or veteran status.

Accessibility & Accommodations

We’re committed to making our hiring process accessible to everyone. If you need accommodations at any stage, just reach out to us at [email protected]—we’re happy to help. Note: This inbox is only for accommodation requests.